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Sipeed Tang Nano 4K FPGA module

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I've been playing with this incredibly cheap (£12) FPGA module from Sipeed in China:  https://www.gowinsemi.com/en/support/devkits_detail/39/ I've provided this link as it's a lot more informative than Sipeed's description. You'll need to scroll down. You can buy the modules, as well as ones with larger chips and different facilities, via AliExpress: https://a.aliexpress.com/_EHg7VcF Here is a nice pic of the module with the pin connections. They now supply an OP2640 2 MP camera plugged into the camera connector. It uses the Gowin Semi GW1NSR-V4CQN48PC 4K device. The free Gowin Educational EDA tools work very well with it - both Verilog and VHDL may be used. I prefer VHDL and have found that ChatGPT does a very good job of converting Verilog code to VHDL, if you ask it nicely. 8) Download the EDA from here:  https://www.gowinsemi.com/en/support/home/ You will need to register and login. BTW, the FPGA incorporates an Arm Cortex-M3 hard core. Several Veril...
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My Old Geocities Website

I found that my old Yahoo Geocities website has been archived here:  https://www.geocities.ws/leon_heller Beware! Don't use an Android phone - the website might try to introduce malware on your phone. My antivirus software catches it. It's OK with a Windows system. I've told the website about it.
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My CV

I thought I'd lost my rather impressive CV but found it in the old Geocities archive - I must put it on my website. It's not much use to me having been retired for some years but it might be of interest. Curriculum Vitae - Leon Heller Personal Details Name: Leon Francis Heller Date of birth: 11 May 1942 Place of birth: London Nationality: British Address: Flat 5, 36 Chapel Park Road Road, St. Leonards-on-Sea, E. Sussex, TN37 6HU Tel: 01424 423947 Email: leon_heller@hotmail.com Education 1953 - 1960 St Clement Danes Grammar School, Ducane Road, Hammersmith, London. O-Level Mathematics, Physics, Chemistry, English Language, English Literature, Geography, French and Biology A-Level Pure and Applied Mathematics, Physics and Chemistry. S-Level Pure and Applied Mathematics, and Physics. State Scholarship awarded. 1960 - 1961 University of Nottingham. 1969 - 1973 Birkbeck College, University of London. B.Sc. Psychology, with subsidiary Mathematics. IIii. First three years were part-ti...
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STM32 Nucleo-H7S3L8

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Got this board recently: I've just been trying it out with the Rowley Associates CrossWorks tools. I gave up with the free STM32CUBE tools.  The board is available from Mouser for about £29.
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New Pimoroni RP2350 Pico Plus 2 Board

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I pre-ordered one of the new Raspberry PI Pico 2 boards as soon as they were announced a few days ago. I saw that Pimoroni had their own similar board, the Pico Plus 2, available so I ordered one of those and received it a couple of days later. I had it flashing its LED in a few minutes. The Pimoroni board has several advantages over the Raspberry Pi unit, like more memory, but costs over twice as much. This is what it looks like:
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Button-controlled LED for Sipeed Tang Primer 25K FPGA board

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This board from Chinese company Sipeed uses a Gowin FPGA from their top of the range Arora V 22nm family - the  GW5A-LV25MG121 - mounted on a tiny plug-in module with an SPI flash memory chip. The module plugs into a dock board fitted with a 40-pin connector and three 12-way sockets. The 40-pin connector is intended for an SRAM board and the 12-way sockets take PMOD modules. They are connected directly to the FPGA so they can be used as general I/O. Sipeed also sells a kit with a selection of PMOD modules and an SRAM board. You can buy the board and PMOD kit here: https://a.aliexpress.com/_EQqvF4N A very simple piece of VHDL code that can be used on the Tang Primer 25K enabling an onboard LED to be controlled with one of the buttons. Useful if you want to try out the board without one of the PMOD modules. Uses button S1 and DONE LED. VHDL code (I called the file led_btn.vhd) library IEEE; use IEEE.STD_LOGIC_1164.ALL; entity led_btn is     Port ( btn : in...
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Blink_LED Converted to VHDL by ChatGPT

I used ChatGPT to convert Verilog file Blink_LED.v mentioned in my Sipeed Tang Nano 20K post to VHDL - see the post. It compiled OK but the resultant netlist wouldn't place and route with the Verilog constraints files. All I had to do was change 'clk' to ''sys_clk' in both files. I don't know why ChatGPT changed 'clk' to 'sys_clk' when it generated the VHDL. I thought that clk might be a reserved word in VHDL but ChatGPT said it wasn't! The chip programmed OK with the bitstream (probably the same as the Verilog one) and the LED is flashing at the same rate. I don't know how well ChatGPT will cope with larger programs.
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